The MN103L Series delivers small size, low power consumption and high performance by implementing 32 expanded instruction functions including 32x32 high-speed multiplication and multiply-and-accumulate operations based on the Microcomputer core with alterable (3 or 4) stage pipeline.
The MN103L Series features a simple architecture with a 3-stage pipeline that preserves instruction set compatibility in order to deliver optimal performance in the medium to low speed segment. Furthermore, it is able to deliver both high performance and low power consumption by implementing 32 extended instruction functions that are shared with the CPU’s internal operations, including 32×32 high-speed multiplication and multiply-and-accumulate operations.
The Series adopts 110-nm flash memory process with low leakage current technology, delivering low power consumption. In addition, it is based on high reliability technology, such as high-temperature operation for automotive applications, and memory data rewrites (100k times). It can incorporate reset IC, oscillator, high multiplication PLL, and other high-accuracy analog circuits, which are external parts in previous model.
Features / Benefits
- 32-bit CPU original core with high-speed calculation ability and low-power consumption
- Abundant Series models including vehicle bus scalability can satisfy the request of system's scalability
- Abundant lineup with up to 2MB(ROM) and 176-pin counts
- System cost can be reduced according to the processing ability and functions depending on customer's system
- Development of green product is possible because of the low power consumption while operating or standing by
- System development man-hour can be reduced by using the same platform for the products from low-end to high-end